三旋光结构一步无进位加法器的设计

宋凯

doi:10.3788/OPE.20162402.0438

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三旋光结构一步无进位加法器的设计

信息科学 | 更新时间：2020-08-13

- 三旋光结构一步无进位加法器的设计
- Design of one-step carry-free adder with three-rotator structure
- 光学精密工程 2016年24卷第2期页码：438-447
- 作者机构：
  
  华东交通大学信息工程学院,江西南昌,330013
- 作者简介：
- 基金信息：
  
  国家自然科学基金资助项目(No.61162001)();江西省自然(青年)科学基金资助项目(No.20132BAB211027,No.20151BAB217017)()
- DOI：10.3788/OPE.20162402.0438
  中图分类号： TP301;TP381
- 收稿日期：2015-09-23，
  
  修回日期：2015-11-12，
  
  纸质出版日期：2016-02-25
- 稿件说明：
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宋凯,. 三旋光结构一步无进位加法器的设计[J]. 光学精密工程, 2016,24(2): 438-447

SONG Kai,. Design of one-step carry-free adder with three-rotator structure[J]. Editorial Office of Optics and Precision Engineering, 2016,24(2): 438-447
宋凯,. 三旋光结构一步无进位加法器的设计[J]. 光学精密工程, 2016,24(2): 438-447 DOI： 10.3788/OPE.20162402.0438.

SONG Kai,. Design of one-step carry-free adder with three-rotator structure[J]. Editorial Office of Optics and Precision Engineering, 2016,24(2): 438-447 DOI： 10.3788/OPE.20162402.0438.

摘要

针对现阶段光学计算机研究中涉及的光学加法器硬件制备困难

输入有限定性等问题

基于MSD(Modified Signed-Digit)加法原理及对称MSD编码技术

设计并实现了一种全新的光学加法器-三旋光结构一步式无进位加法器。阐述了该加法器的主光路结构设计过程和方案

给出了三旋光器抽象结构

分析和设计了控制光路的光路结构

并给出了易于硬件制备的电路实现具体方案。该加法器制备简单

对输入没有限制

并且可以一步并行完成数以千位的加法。针对上述光路和电路实现方案进行了实验验证

完成了13位以内的二进制数的无进位加法运算。实验结果表明:本文所设计的一步式无进位加法器原理正确、方案合理

并具有众多数据位数并行运算的潜力。

Abstract

The research of optical adders for modern optical computers suffers from hardware implementation difficulties

limited qualitative inputs and so on

so this paper designs and complements a new optical adder. It is a three-rotator structure one-step adder with carry-free based on Modified Signed-Digit(MSD) addition theory and symmetry MSD coding technology. The paper describes the main optical structure design and programs of the adder in detail

gives the abstract structure of the three rotator

designs the optical structure of the control optical path

and offers specific programs of circuit implementation. The adder can easily be achieved

does not limit inputs

and can implement thousands of data-bit addition by a parallel model in a single step. Finally

specific experiments are designed to verify above optical structures and circuit scheme

and the carry-free binary addition of 13 data-bits is completed. Experimental results show that the principle of the one-step carry-free adder design is correct

the circuit scheme is reasonable

and it has great potential in the numerous data bit parallel computing.

关键词

Keywords

references

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